On Thu, Feb 25, 2021 at 10:26:31PM +0800, Liguang Zhang wrote: > IC_DATA_CMD[11] indicates the first data byte received after the address > phase for receive transfer in Master receiver or Slave receiver mode, > this bit was set in some transfer flow. IC_DATA_CMD[7:0] contains the > data to be transmitted or received on the I2C bus, so we should use the > lower 8 bits to get the real data length.
Reviewed-by: Andy Shevchenko <[email protected]> > Signed-off-by: Liguang Zhang <[email protected]> > --- > drivers/i2c/busses/i2c-designware-core.h | 2 ++ > drivers/i2c/busses/i2c-designware-master.c | 2 +- > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/i2c/busses/i2c-designware-core.h > b/drivers/i2c/busses/i2c-designware-core.h > index 85307cfa7109..5392b82f68a4 100644 > --- a/drivers/i2c/busses/i2c-designware-core.h > +++ b/drivers/i2c/busses/i2c-designware-core.h > @@ -38,6 +38,8 @@ > #define DW_IC_CON_TX_EMPTY_CTRL BIT(8) > #define DW_IC_CON_RX_FIFO_FULL_HLD_CTRL BIT(9) > > +#define DW_IC_DATA_CMD_DAT GENMASK(7, 0) > + > /* > * Registers offset > */ > diff --git a/drivers/i2c/busses/i2c-designware-master.c > b/drivers/i2c/busses/i2c-designware-master.c > index d6425ad6e6a3..dd27b9dbe931 100644 > --- a/drivers/i2c/busses/i2c-designware-master.c > +++ b/drivers/i2c/busses/i2c-designware-master.c > @@ -432,7 +432,7 @@ i2c_dw_read(struct dw_i2c_dev *dev) > regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); > /* Ensure length byte is a valid value */ > if (flags & I2C_M_RECV_LEN && > - tmp <= I2C_SMBUS_BLOCK_MAX && tmp > 0) { > + (tmp & DW_IC_DATA_CMD_DAT) <= I2C_SMBUS_BLOCK_MAX > && tmp > 0) { > len = i2c_dw_recv_len(dev, tmp); > } > *buf++ = tmp; > -- > 2.19.1.6.gb485710b > -- With Best Regards, Andy Shevchenko
