[PATCH 5.11 308/775] clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL

[Greg Kroah-Hartman]

From: Martin Blumenstingl <martin.blumensti...@googlemail.com>

[ Upstream commit 2f290b7c67adf6459a17a4c978102af35cd62e4a ]

The "rate" parameter in meson_clk_pll_set_rate() contains the new rate.
Retrieve the old rate with clk_hw_get_rate() so we don't inifinitely try
to switch from the new rate to the same rate again.

Fixes: 7a29a869434e8b ("clk: meson: Add support for Meson clock controller")
Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
Link: 
https://lore.kernel.org/r/20201226121556.975418-2-martin.blumensti...@googlemail.com
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 drivers/clk/meson/clk-pll.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index b17a13e9337c4..9404609b5ebfa 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -371,7 +371,7 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, 
unsigned long rate,
        if (parent_rate == 0 || rate == 0)
                return -EINVAL;
 
-       old_rate = rate;
+       old_rate = clk_hw_get_rate(hw);
 
        ret = meson_clk_get_pll_settings(rate, parent_rate, &m, &n, pll);
        if (ret)
-- 
2.27.0