On 2021/3/2 6:34, Sean Christopherson wrote:
On Wed, Feb 03, 2021, Like Xu wrote:
@@ -348,10 +352,26 @@ static bool intel_pmu_handle_lbr_msrs_access(struct 
kvm_vcpu *vcpu,
        return true;
  }
+/*
+ * Check if the requested depth values is supported
+ * based on the bits [0:7] of the guest cpuid.1c.eax.
+ */
+static bool arch_lbr_depth_is_valid(struct kvm_vcpu *vcpu, u64 depth)
+{
+       struct kvm_cpuid_entry2 *best;
+
+       best = kvm_find_cpuid_entry(vcpu, 0x1c, 0);
+       if (depth && best)

+               return (best->eax & 0xff) & (1ULL << (depth / 8 - 1));

I believe this will genereate undefined behavior if depth > 64.  Or if depth < 
8.
And I believe this check also needs to enforce that depth is a multiple of 8.

    For each bit n set in this field, the IA32_LBR_DEPTH.DEPTH value 8*(n+1) is
    supported.

Thus it's impossible for 0-7, 9-15, etc... to be legal depths.

Thank you! How about:

        best = kvm_find_cpuid_entry(vcpu, 0x1c, 0);
        if (best && depth && !(depth % 8))
                return (best->eax & 0xff) & (1ULL << (depth / 8 - 1));

        return false;



+
+       return false;
+}
+


Reply via email to