Hi Paul,
On 2021/3/7 下午10:17, Paul Cercueil wrote:
Hi,
Here are a set of patches to add support for the Ingenic JZ4760(B) SoCs.
One thing to note is that the ingenic,jz4760-tcu is undocumented for now,
as I will update the TCU documentation in a different patchset.
Zhou: the CGU code now supports overriding the PLL M/N/OD calc
algorithm, please tell me if it works for you.
Newly found two problems, the first problem is because I2S PLL does not
have a stable bit, so we need to follow the bypass bit, which is only do
corresponding processing when "stable_bit > = 0".
The second problem is that the I2S PLL cannot switch the parent clock
after using the PLL framework, so it cannot use SCLKA and MPLL as the
parent clock (when trying to switch the parent clock, it will stuck and
accompany "clk: failed to reparent i2s to mpll: -22").
Cheers,
-Paul
Paul Cercueil (6):
dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles
clk: Support bypassing dividers
clk: ingenic: Read bypass register only when there is one
clk: ingenic: Remove pll_info.no_bypass_bit
clk: ingenic: Support overriding PLLs M/N/OD calc algorithm
clk: ingenic: Add support for the JZ4760
.../bindings/clock/ingenic,cgu.yaml | 4 +
drivers/clk/ingenic/Kconfig | 10 +
drivers/clk/ingenic/Makefile | 1 +
drivers/clk/ingenic/cgu.c | 92 ++--
drivers/clk/ingenic/cgu.h | 12 +-
drivers/clk/ingenic/jz4725b-cgu.c | 12 +-
drivers/clk/ingenic/jz4740-cgu.c | 12 +-
drivers/clk/ingenic/jz4760-cgu.c | 433 ++++++++++++++++++
drivers/clk/ingenic/jz4770-cgu.c | 15 +-
drivers/clk/ingenic/tcu.c | 2 +
include/dt-bindings/clock/jz4760-cgu.h | 54 +++
11 files changed, 591 insertions(+), 56 deletions(-)
create mode 100644 drivers/clk/ingenic/jz4760-cgu.c
create mode 100644 include/dt-bindings/clock/jz4760-cgu.h
