To get the changes in:

Liang Kan's patch
("perf: Introduce PERF_TYPE_HARDWARE_PMU and PERF_TYPE_HW_CACHE_PMU")

Kan's patch is in review at the moment, but the following perf tool
patches need this interface for hybrid support.

This patch can be removed after Kan's patch is upstreamed.

Signed-off-by: Jin Yao <yao....@linux.intel.com>
---
 tools/include/uapi/linux/perf_event.h | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/tools/include/uapi/linux/perf_event.h 
b/tools/include/uapi/linux/perf_event.h
index ad15e40d7f5d..c0a511eea498 100644
--- a/tools/include/uapi/linux/perf_event.h
+++ b/tools/include/uapi/linux/perf_event.h
@@ -33,6 +33,8 @@ enum perf_type_id {
        PERF_TYPE_HW_CACHE                      = 3,
        PERF_TYPE_RAW                           = 4,
        PERF_TYPE_BREAKPOINT                    = 5,
+       PERF_TYPE_HARDWARE_PMU                  = 6,
+       PERF_TYPE_HW_CACHE_PMU                  = 7,
 
        PERF_TYPE_MAX,                          /* non-ABI */
 };
@@ -94,6 +96,30 @@ enum perf_hw_cache_op_result_id {
        PERF_COUNT_HW_CACHE_RESULT_MAX,         /* non-ABI */
 };
 
+/*
+ * attr.config layout for type PERF_TYPE_HARDWARE* and PERF_TYPE_HW_CACHE*
+ * PERF_TYPE_HARDWARE:         0xAA
+ *                             AA: hardware event ID
+ * PERF_TYPE_HW_CACHE:         0xCCBBAA
+ *                             AA: hardware cache ID
+ *                             BB: hardware cache op ID
+ *                             CC: hardware cache op result ID
+ * PERF_TYPE_HARDWARE_PMU:     0xDD000000AA
+ *                             AA: hardware event ID
+ *                             DD: PMU type ID
+ * PERF_TYPE_HW_CACHE_PMU:     0xDD00CCBBAA
+ *                             AA: hardware cache ID
+ *                             BB: hardware cache op ID
+ *                             CC: hardware cache op result ID
+ *                             DD: PMU type ID
+ */
+#define PERF_HW_CACHE_ID_SHIFT                 0
+#define PERF_HW_CACHE_OP_ID_SHIFT              8
+#define PERF_HW_CACHE_OP_RESULT_ID_SHIFT       16
+#define PERF_HW_CACHE_EVENT_MASK               0xffffff
+
+#define PERF_PMU_TYPE_SHIFT                    32
+
 /*
  * Special "software" events provided by the kernel, even if the hardware
  * does not support performance events. These events measure various
-- 
2.17.1

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