Hi Wolfram, Thanks for your patch.
On 2021-03-11 10:09:18 +0100, Wolfram Sang wrote: > Signed-off-by: Wolfram Sang <wsa+rene...@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+rene...@ragnatech.se> > --- > > Changes since V1: > * none, but additional testing was done which revealed that this CMT > in deed behaves the same as other Gen3 SoCs. There was one hickup > which seemed unique to V3U but has been reproduced with M3N meanwhile. > This is something we need to tackle, but no reason to prevent adding > V3U support. > > Documentation/devicetree/bindings/timer/renesas,cmt.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > index 428db3a21bb9..363ec28e07da 100644 > --- a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml > @@ -79,6 +79,7 @@ properties: > - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H > - renesas,r8a77990-cmt0 # 32-bit CMT0 on R-Car E3 > - renesas,r8a77995-cmt0 # 32-bit CMT0 on R-Car D3 > + - renesas,r8a779a0-cmt0 # 32-bit CMT0 on R-Car V3U > - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and > RZ/G2 > > - items: > @@ -94,6 +95,7 @@ properties: > - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H > - renesas,r8a77990-cmt1 # 48-bit CMT on R-Car E3 > - renesas,r8a77995-cmt1 # 48-bit CMT on R-Car D3 > + - renesas,r8a779a0-cmt1 # 48-bit CMT on R-Car V3U > - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and > RZ/G2 > > reg: > -- > 2.30.0 > -- Regards, Niklas Söderlund
