The Ralink MIPS platform does not use Common Clock Framework and does
not define certain clock operations leading to compile test failures:
/usr/bin/mips-linux-gnu-ld: drivers/usb/phy/phy-tegra-usb.o: in function
`tegra_usb_phy_init':
phy-tegra-usb.c:(.text+0x1dd4): undefined reference to `clk_get_parent'
Reported-by: kernel test robot <l...@intel.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlow...@canonical.com>
---
arch/mips/ralink/clk.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
index 2f9d5acb38ea..8387177a47ef 100644
--- a/arch/mips/ralink/clk.c
+++ b/arch/mips/ralink/clk.c
@@ -70,6 +70,20 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
}
EXPORT_SYMBOL_GPL(clk_round_rate);
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ WARN_ON(clk);
+ return -1;
+}
+EXPORT_SYMBOL(clk_set_parent);
+
+struct clk *clk_get_parent(struct clk *clk)
+{
+ WARN_ON(clk);
+ return NULL;
+}
+EXPORT_SYMBOL(clk_get_parent);
+
void __init plat_time_init(void)
{
struct clk *clk;
--
2.25.1
