On Tue, Mar 02, 2021 at 02:13:57AM -0800, Jacob Pan wrote: > Write protect bit, when set, inhibits supervisor writes to the read-only > pages. In supervisor shared virtual addressing (SVA), where page tables > are shared between CPU and DMA, IOMMU PASID entry WPE bit should match > CR0.WP bit in the CPU. > This patch sets WPE bit for supervisor PASIDs if CR0.WP is set. > > Signed-off-by: Sanjay Kumar <sanjay.k.ku...@intel.com> > Signed-off-by: Jacob Pan <jacob.jun....@linux.intel.com> > ---
ia64:defconfig: drivers/iommu/intel/pasid.c: In function 'pasid_enable_wpe': drivers/iommu/intel/pasid.c:536:22: error: implicit declaration of function 'read_cr0' drivers/iommu/intel/pasid.c:539:23: error: 'X86_CR0_WP' undeclared Maybe it _is_ time to retire ia64 ? Guenter
