On Wed, Mar 24, 2021 at 02:30:35PM -0700, Dan Williams wrote: > In preparation for common register mapping facility, introduce a generic > container, 'struct cxl_regs', for CXL device register and later > component register block base pointers. Some CXL device types implement > both.
The code looks like complete gibberish to me with a struct of a union of a struct declaring members in a macro. This needs a much more detailed explanation and rationale.
