On 16/03/2021 10:22, Chunfeng Yun wrote:
> Harmonize node names, compatibles and properties.
>
> Signed-off-by: Chunfeng Yun <chunfeng....@mediatek.com>
Applied now to v5.12-next/dts64
> ---
> v4~v5: no changes
> v3: remove property clock-names suggested by CK
> v2: no changes
> ---
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 +++-----
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 80519a145f13..8882d35ac6ab 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -880,7 +880,7 @@
> ranges;
> status = "disabled";
>
> - usb_host: xhci@11200000 {
> + usb_host: usb@11200000 {
> compatible = "mediatek,mt8183-xhci",
> "mediatek,mtk-xhci";
> reg = <0 0x11200000 0 0x1000>;
> @@ -923,11 +923,10 @@
> status = "disabled";
> };
>
> - mipi_tx0: mipi-dphy@11e50000 {
> + mipi_tx0: dsi-phy@11e50000 {
> compatible = "mediatek,mt8183-mipi-tx";
> reg = <0 0x11e50000 0 0x1000>;
> clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>;
> - clock-names = "ref_clk";
> #clock-cells = <0>;
> #phy-cells = <0>;
> clock-output-names = "mipi_tx0_pll";
> @@ -946,11 +945,10 @@
> };
> };
>
> - u3phy: usb-phy@11f40000 {
> + u3phy: t-phy@11f40000 {
> compatible = "mediatek,mt8183-tphy",
> "mediatek,generic-tphy-v2";
> #address-cells = <1>;
> - #phy-cells = <1>;
> #size-cells = <1>;
> ranges = <0 0 0x11f40000 0x1000>;
> status = "okay";
>
