tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   1e43c377a79f9189fea8f2711b399d4e8b4e609b
commit: 50f53fb721817a6efa541cca24f1b7caa84801c1 arm64: trans_pgd: make 
trans_pgd_map_page generic
date:   9 weeks ago
config: arm64-randconfig-s032-20210330 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce:
        wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
        chmod +x ~/bin/make.cross
        # apt-get install sparse
        # sparse version: v0.6.3-279-g6d5d9b42-dirty
        # 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=50f53fb721817a6efa541cca24f1b7caa84801c1
        git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
        git fetch --no-tags linus master
        git checkout 50f53fb721817a6efa541cca24f1b7caa84801c1
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <l...@intel.com>


sparse warnings: (new ones prefixed by >>)
   arch/arm64/kernel/hibernate.c:181:39: sparse: sparse: cast to restricted 
gfp_t
>> arch/arm64/kernel/hibernate.c:202:44: sparse: sparse: cast from restricted 
>> gfp_t

vim +202 arch/arm64/kernel/hibernate.c

   183  
   184  /*
   185   * Copies length bytes, starting at src_start into an new page,
   186   * perform cache maintenance, then maps it at the specified address low
   187   * address as executable.
   188   *
   189   * This is used by hibernate to copy the code it needs to execute when
   190   * overwriting the kernel text. This function generates a new set of 
page
   191   * tables, which it loads into ttbr0.
   192   *
   193   * Length is provided as we probably only want 4K of data, even on a 64K
   194   * page system.
   195   */
   196  static int create_safe_exec_page(void *src_start, size_t length,
   197                                   unsigned long dst_addr,
   198                                   phys_addr_t *phys_dst_addr)
   199  {
   200          struct trans_pgd_info trans_info = {
   201                  .trans_alloc_page       = hibernate_page_alloc,
 > 202                  .trans_alloc_arg        = (void *)GFP_ATOMIC,
   203          };
   204  
   205          void *page = (void *)get_safe_page(GFP_ATOMIC);
   206          pgd_t *trans_pgd;
   207          int rc;
   208  
   209          if (!page)
   210                  return -ENOMEM;
   211  
   212          memcpy(page, src_start, length);
   213          __flush_icache_range((unsigned long)page, (unsigned long)page + 
length);
   214  
   215          trans_pgd = (void *)get_safe_page(GFP_ATOMIC);
   216          if (!trans_pgd)
   217                  return -ENOMEM;
   218  
   219          rc = trans_pgd_map_page(&trans_info, trans_pgd, page, dst_addr,
   220                                  PAGE_KERNEL_EXEC);
   221          if (rc)
   222                  return rc;
   223  
   224          /*
   225           * Load our new page tables. A strict BBM approach requires 
that we
   226           * ensure that TLBs are free of any entries that may overlap 
with the
   227           * global mappings we are about to install.
   228           *
   229           * For a real hibernate/resume cycle TTBR0 currently points to 
a zero
   230           * page, but TLBs may contain stale ASID-tagged entries (e.g. 
for EFI
   231           * runtime services), while for a userspace-driven test_resume 
cycle it
   232           * points to userspace page tables (and we must point it at a 
zero page
   233           * ourselves). Elsewhere we only (un)install the idmap with 
preemption
   234           * disabled, so T0SZ should be as required regardless.
   235           */
   236          cpu_set_reserved_ttbr0();
   237          local_flush_tlb_all();
   238          write_sysreg(phys_to_ttbr(virt_to_phys(trans_pgd)), ttbr0_el1);
   239          isb();
   240  
   241          *phys_dst_addr = virt_to_phys(page);
   242  
   243          return 0;
   244  }
   245  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org

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