Hi! On Wednesday 23 January 2008, Haavard Skinnemoen wrote: > On Wed, 23 Jan 2008 13:30:32 +0100 > Marc Pignat <[EMAIL PROTECTED]> wrote: > > On Wednesday 23 January 2008, Haavard Skinnemoen wrote: ... > > Ok, but then any power of two larger than the cache line size should be > fine, assuming kmalloc() returns a properly aligned buffer. Yes. The memory should be allocated using GFP_KERNEL | GFP_DMA flags, but this is probably a nop on at91 and avr32.
I prepare a patch using the generic dma api (allocation + dma mapping in one call = simpler code). > > Other than that, I can't see any reason why a platform with 64 byte > cache lines should need larger buffers than one with 32 byte cache > lines. If the memory at the end of the cacheline is used by the cpu, it will be corrupted while you call dma_sync_single_for_cpu(..., DMA_FROM_DEVICE); ... > There are still issues with the DMA code that the PIO code doesn't > have. So I think it should be selectable until we can sort out the > error/break handling. ok > > Haavard > Regards Marc -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
