Add PON, RTC and other PMIC infra modules support for PMK8350.

Signed-off-by: satya priya <ska...@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/pmk8350.dtsi | 55 ++++++++++++++++++++++++++++++++++-
 1 file changed, 54 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/pmk8350.dtsi 
b/arch/arm64/boot/dts/qcom/pmk8350.dtsi
index 1530b8f..bbd9fa7 100644
--- a/arch/arm64/boot/dts/qcom/pmk8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmk8350.dtsi
@@ -3,6 +3,12 @@
  * Copyright (c) 2021, Linaro Limited
  */
 
+#include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
+#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
+#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
+#include <dt-bindings/iio/qcom,spmi-adc7-pmr735b.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/spmi/spmi.h>
 
@@ -13,10 +19,57 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
+               pmk8350_pon: pon@1300 {
+                       compatible = "qcom,pm8998-pon";
+                       reg = <0x1300>;
+
+                       pwrkey {
+                               compatible = "qcom,pmk8350-pwrkey";
+                               interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
+                               linux,code = <KEY_POWER>;
+                       };
+
+                       resin {
+                               compatible = "qcom,pmk8350-resin";
+                               interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
+                               linux,code = <KEY_VOLUMEDOWN>;
+                       };
+               };
+
+               pmk8350_vadc: adc@3100 {
+                       compatible = "qcom,spmi-adc7";
+                       reg = <0x3100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "eoc-int-en-set";
+                       #io-channel-cells = <1>;
+                       io-channel-ranges;
+               };
+
+               pmk8350_adc_tm: adc-tm@3400 {
+                       compatible = "qcom,adc-tm7";
+                       reg = <0x3400>;
+                       interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "threshold";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       #thermal-sensor-cells = <1>;
+                       status = "disabled";
+               };
+
+               pmk8350_rtc: rtc@6100 {
+                       compatible = "qcom,pmk8350-rtc";
+                       reg = <0x6100>, <0x6200>;
+                       reg-names = "rtc", "alarm";
+                       interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
+               };
+
                pmk8350_gpios: gpio@b000 {
-                       compatible = "qcom,pmk8350-gpio";
+                       compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio";
                        reg = <0xb000>;
                        gpio-controller;
+                       gpio-ranges = <&pmk8350_gpios 0 0 4>;
                        #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation

Reply via email to