On Mon, Mar 29, 2021 at 10:56:25AM -0600, Mathieu Poirier wrote:
> Hi Peter,
>
> On Tue, Mar 23, 2021 at 12:06:32PM +0000, Suzuki K Poulose wrote:
> > CoreSight PMU supports aux-buffer for the ETM tracing. The trace
> > generated by the ETM (associated with individual CPUs, like Intel PT)
> > is captured by a separate IP (CoreSight TMC-ETR/ETF until now).
> >
> > The TMC-ETR applies formatting of the raw ETM trace data, as it
> > can collect traces from multiple ETMs, with the TraceID to indicate
> > the source of a given trace packet.
> >
> > Arm Trace Buffer Extension is new "sink" IP, attached to individual
> > CPUs and thus do not provide additional formatting, like TMC-ETR.
> >
> > Additionally, a system could have both TRBE *and* TMC-ETR for
> > the trace collection. e.g, TMC-ETR could be used as a single
> > trace buffer to collect data from multiple ETMs to correlate
> > the traces from different CPUs. It is possible to have a
> > perf session where some events end up collecting the trace
> > in TMC-ETR while the others in TRBE. Thus we need a way
> > to identify the type of the trace for each AUX record.
> >
> > Define the trace formats exported by the CoreSight PMU.
> > We don't define the flags following the "ETM" as this
> > information is available to the user when issuing
> > the session. What is missing is the additional
> > formatting applied by the "sink" which is decided
> > at the runtime and the user may not have a control on.
> >
> > So we define :
> > - CORESIGHT format (indicates the Frame format)
> > - RAW format (indicates the format of the source)
> >
> > The default value is CORESIGHT format for all the records
> > (i,e == 0). Add the RAW format for others that use
> > raw format.
> >
> > Cc: Peter Zijlstra <pet...@infradead.org>
> > Cc: Mike Leach <mike.le...@linaro.org>
> > Cc: Mathieu Poirier <mathieu.poir...@linaro.org>
> > Cc: Leo Yan <leo....@linaro.org>
> > Cc: Anshuman Khandual <anshuman.khand...@arm.com>
> > Reviewed-by: Mike Leach <mike.le...@linaro.org>
> > Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
> > Signed-off-by: Suzuki K Poulose <suzuki.poul...@arm.com>
> > ---
> > include/uapi/linux/perf_event.h | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/include/uapi/linux/perf_event.h
> > b/include/uapi/linux/perf_event.h
> > index f006eeab6f0e..63971eaef127 100644
> > --- a/include/uapi/linux/perf_event.h
> > +++ b/include/uapi/linux/perf_event.h
> > @@ -1162,6 +1162,10 @@ enum perf_callchain_context {
> > #define PERF_AUX_FLAG_COLLISION 0x08 /* sample
> > collided with another */
> > #define PERF_AUX_FLAG_PMU_FORMAT_TYPE_MASK 0xff00 /* PMU specific trace
> > format type */
> >
> > +/* CoreSight PMU AUX buffer formats */
> > +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_CORESIGHT 0x0000 /* Default for
> > backward compatibility */
> > +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW 0x0100 /* Raw format of
> > the source */
> > +
>
> Have you had time to review this patch? Anything you'd like to see modified?
Ok I suppose..
Acked-by: Peter Zijlstra (Intel) <pet...@infradead.org>
