On 14/09/2023 19:29, Steven Rostedt wrote:
> On Thu, 14 Sep 2023 13:17:00 -0400
> Steven Rostedt <rost...@goodmis.org> wrote:
> 
>> Now lets look at big endian layout:
>>
>>  uaddr = 0xbeef0004
>>  enabler = 1;
>>
>>  memory at 0xbeef0000:  00 00 00 00 00 00 00 02
>>                                     ^
>>                                     addr: 0xbeef0004
>>
>>                              (enabler is set )
>>
>>      bitoffset = uaddr & (sizeof(unsigned long) - 1); bitoffset = 4
>>      bit_offset *= 8;                                 bitoffset = 32
>>      uaddr &= ~(sizeof(unsigned long) - 1);           uaddr = 0xbeef0000
>>
>>      ptr = kaddr + (uaddr & ~PAGE_MASK);
>>
>>      clear_bit(1 + 32, ptr);
>>
>>  memory at 0xbeef0000:  00 00 00 00 00 00 00 02
>>                                   ^
>>                              bit 33 of 0xbeef0000
>>
>> I don't think that's what you expected!
> 
> I believe the above can be fixed with:
> 
>       bit_offset = uaddr & (sizeof(unsigned long) - 1);
>       if (bit_offset) {
> #ifdef CONFIG_CPU_BIG_ENDIAN
>               bit_offest = 0;
> #else
>               bit_offset *= BITS_PER_BYTE;
> #endif
>               uaddr &= ~(sizeof(unsigned long) - 1);
>       }

Hi Steven,

Nice catch ! I don't have big endian at end but I'll check that.

Thanks,

> 
> -- Steve

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