H. Peter Anvin wrote:

> Followup to:  <[EMAIL PROTECTED]>
> By author:    Mikael Pettersson <[EMAIL PROTECTED]>
> In newsgroup: linux.dev.kernel
> 
>> Before people get too exited about the x86 Page Attribute Table ...
>> Does Linux use mode B (CR4.PSE=1) or mode C (CR4.PAE=1) paging?
>> If so, known P6 errata must be taken into account.
>> In particular, Pentium III errata E27 and Pentium II errata A56
>> imply that only the low four PAT entries are working for 4KB
>> pages, if CR4.PSE or CR4.PAE is enabled.
>> 
> 
> 
> All of the above.  Sounds like PAT should be declared broken on these
> chips.
> 
>       -hpa

We can do set PAT entry one to be write combined.  Currently it doesn't 
look like anyone is using write through page mapping anywhere in the 
kernel (Just PAGE_PWT set).  Am I correct in that assumption?

-Jeff

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