On 04/06/2024 19:14, Hari Nagalla wrote: > The C7xv-dsp on AM62A have 32KB L1 I-cache and a 64KB L1 D-cache. It > does not have an addressable l1dram . So, remove this optional sram > property from the bindings to fix device tree build warnings. > > Signed-off-by: Hari Nagalla <hnaga...@ti.com> > --- > Changes in v3: > *) Use allOf keyword with separate ifs for each variant instead > of nested if/else conditions.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlow...@linaro.org> Best regards, Krzysztof
