On 6/21/2024 5:16 PM, Gokul Sriram Palanisamy wrote:
Enable remoteproc WCSS PIL driver with glink. Also,
configure shared memory and enables smp2p required for IPC.

Signed-off-by: Nikhil Prakash V <quic_nprak...@quicinc.com>
Signed-off-by: Sricharan R <quic_srich...@quicinc.com>
Signed-off-by: Gokul Sriram Palanisamy <quic_gokul...@quicinc.com>
---
  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 80 +++++++++++++++++++++++++++
  1 file changed, 80 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 92682d3c9478..b98766cce0d6 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -108,6 +108,12 @@ memory@4ac00000 {
                        reg = <0x0 0x4ac00000 0x0 0x400000>;
                        no-map;
                };
+
+               q6_region: memory@4b000000 {
+                       no-map;

move the no-map after reg, to align with other entries.

+                       reg = <0x0 0x4b000000 0x0 0x5f00000>;
+               };
+
        };
firmware {
@@ -117,6 +123,30 @@ scm {
                };
        };

...

+ q6v5_wcss: remoteproc@cd00000 {
+                       compatible = "qcom,ipq8074-wcss-pil";
+                       reg = <0x0cd00000 0x4040>,
+                             <0x004ab000 0x20>;
+                       reg-names = "qdsp6",
+                                   "rmb";
+                       qca,auto-restart;
+                       qca,extended-intc;
+                       interrupts-extended = <&intc 0 325 1>,


Use macros instead of open coding.

+                                             <&wcss_smp2p_in 0 0>,
+                                             <&wcss_smp2p_in 1 0>,
+                                             <&wcss_smp2p_in 2 0>,
+                                             <&wcss_smp2p_in 3 0>;
+                       interrupt-names = "wdog",
+                                         "fatal",
+                                         "ready",
+                                         "handover",
+                                         "stop-ack";
+
+                       resets = <&gcc GCC_WCSSAON_RESET>,
+                                <&gcc GCC_WCSS_BCR>,
+                                <&gcc GCC_WCSS_Q6_BCR>;
+
+                       reset-names = "wcss_aon_reset",
+                                     "wcss_reset",
+                                     "wcss_q6_reset";
+
+                       clocks = <&gcc GCC_PRNG_AHB_CLK>;
+                       clock-names = "prng";
+
+                       qcom,halt-regs = <&tcsr 0xa000 0xd000 0xe000>;
+
+                       qcom,smem-states = <&wcss_smp2p_out 0>,
+                                          <&wcss_smp2p_out 1>;
+                       qcom,smem-state-names = "shutdown",
+                                               "stop";
+
+                       memory-region = <&q6_region>;
+
+                       glink-edge {
+                               interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
+                               qcom,remote-pid = <1>;
+                               mboxes = <&apcs_glb 8>;
+
+                               rpm_requests {
+                                       qcom,glink-channels = "rpm_requests";
+                               };
+                       };
+               };
+
                pcie1: pcie@10000000 {
                        compatible = "qcom,pcie-ipq8074";
                        reg = <0x10000000 0xf1d>,

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