Hi Luca. On 12/9/24 14:01, Luca Weiss wrote:
Currently the Qualcomm CAMSS driver only supports D-PHY while the hardware on most SoCs also supports C-PHY. Until this support is added, check for D-PHY to make it somewhat explicit that C-PHY won't work.Signed-off-by: Luca Weiss <luca.we...@fairphone.com> --- drivers/media/platform/qcom/camss/camss.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 9fb31f4c18adee886cd0bcf84438a8f27635e07f..b99af35074cdf6fa794a0d2f0d54ecf12ac354d9 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -1855,6 +1855,15 @@ static int camss_of_parse_endpoint_node(struct device *dev, if (ret) return ret;+ /*+ * Most SoCs support both D-PHY and C-PHY standards, but currently only + * D-PHY is supported in the driver. + */ + if (vep.bus_type != V4L2_MBUS_CSI2_DPHY) { + dev_err(dev, "Unsupported bus type %d\n", vep.bus_type); + return -EINVAL; + } + csd->interface.csiphy_id = vep.base.port;mipi_csi2 = &vep.bus.mipi_csi2;
My cautious worries were futile, the change works as expected and the regression testing on RB5 is passed: ===== begin parsing endpoint /soc@0/camss@ac6a000/ports/port@2/endpoint fwnode video bus type not specified (0), mbus type not specified (0) lane 0 position 0 lane 1 position 1 lane 2 position 2 lane 3 position 3 clock lane position 7 no lane polarities defined, assuming not inverted assuming media bus type MIPI CSI-2 D-PHY (5) ===== end parsing endpoint /soc@0/camss@ac6a000/ports/port@2/endpoint Tested-by: Vladimir Zapolskiy <vladimir.zapols...@linaro.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapols...@linaro.org> -- Best wishes, Vladimir
