Am Montag, dem 10.03.2025 um 23:35 +0100 schrieb André Apitzsch: > Hi Sakari, > > Am Montag, dem 10.03.2025 um 11:11 +0000 schrieb Sakari Ailus: > > Hi André, > > > > On Sat, Mar 08, 2025 at 10:47:54PM +0100, André Apitzsch via B4 > > Relay > > wrote: > > > The imx214 driver currently supports only a 24MHz external clock. > > > But > > > there are devices, like Qualcomm-MSM8916-based phones, which > > > cannot > > > provide this frequency. To make the sensor usable by those > > > devices, > > > add > > > support for 23.88MHz clock. > > > > > > Signed-off-by: André Apitzsch <g...@apitzsch.eu> > > > --- > > > André Apitzsch (4): > > > media: i2c: imx214: Calculate link bit rate from clock > > > frequency > > > media: i2c: imx214: Prepare for variable clock frequency > > > media: i2c: imx214: Read clock frequency from device tree > > > media: i2c: imx214: Add support for 23.88MHz clock > > > > > > drivers/media/i2c/imx214.c | 188 > > > +++++++++++++++++++++++++++++++++++---------- > > > 1 file changed, 146 insertions(+), 42 deletions(-) > > > > Thanks for the patches. > > > > Do you think the driver could use the CCS PLL calculator? The PLL > > appears to be compliant. The AR0234 driver will do the same. (The > > sensor might just work with the CCS driver, too, but that's another > > discussion.) > > > Using the CCS PLL calculator seems quite complicated compared to > switching to the CCS driver. That's why I looked at the later first. > But for it to work, quirks already need to be applied in > ccs_power_on(), to disable writing to COMPRESSION_MODE, and in > ccs_identify_module(), to change the MODULE_MANUFACTURER_ID register. > > I'll check if CCS PLL calculator could be used. > > Best regards, > André
Hi Sakari, the CCS PLL calculator seems to work (up to one problem) and to be a more elegant way forward. The problem is, that the pixel rate is too small by a factor of 10 and I cannot figure out why. Any help would be appreciated. My devices uses a clock-frequency of 24000000 and a link-frequency of 600000000. There are four data lanes. The calculator returns a pixel rate of 480.000.000. The expected value is 4800.000.000. You can find the PLL input parameters in [1] and the generated debug output below. Best regards, André [1] https://github.com/a-andre/linux/blob/58e10a814985f700579847ac7c99468a65cb55bb/drivers/media/i2c/imx214.c#L1116-L1196 $ dmesg | grep imx [ 17.851215] imx214 4-0010: vt_lanes: 4 [ 17.851245] imx214 4-0010: op_lanes: 4 [ 17.851254] imx214 4-0010: binning: 1x1 [ 17.851262] imx214 4-0010: min / max op_pre_pll_clk_div: 1 / 15 [ 17.851272] imx214 4-0010: pre-pll check: min / max op_pre_pll_clk_div: 1 / 15 [ 17.851281] imx214 4-0010: mul 50 / div 1 [ 17.851290] imx214 4-0010: pll_op check: min / max op_pre_pll_clk_div: 1 / 15 [ 17.851300] imx214 4-0010: op_pre_pll_clk_div 1 [ 17.851308] imx214 4-0010: more_mul_max: max_op_pll_multiplier check: 24 [ 17.851317] imx214 4-0010: more_mul_max: max_pll_op_clk_freq_hz check: 1 [ 17.851325] imx214 4-0010: more_mul_max: max_op_sys_clk_div check: 1 [ 17.851333] imx214 4-0010: more_mul_max: min_pll_multiplier check: 1 [ 17.851341] imx214 4-0010: more_mul_min: min_op_pll_op_clk_freq_hz check: 1 [ 17.851349] imx214 4-0010: more_mul_min: min_op_pll_multiplier check: 1 [ 17.851357] imx214 4-0010: more_mul_factor: 1 [ 17.851365] imx214 4-0010: more_mul_factor: min_op_sys_clk_div: 1 [ 17.851373] imx214 4-0010: final more_mul: 1 [ 17.851381] imx214 4-0010: op_sys_clk_div: 1 [ 17.851389] imx214 4-0010: op_pix_clk_div: 10 [ 17.851398] imx214 4-0010: min_vt_div: 10 [ 17.851406] imx214 4-0010: min_vt_div: max_vt_pix_clk_freq_hz: 10 [ 17.851414] imx214 4-0010: min_vt_div: min_vt_clk_div: 10 [ 17.851422] imx214 4-0010: max_vt_div: 40 [ 17.851486] imx214 4-0010: max_vt_div: min_vt_pix_clk_freq_hz: 40 [ 17.851502] imx214 4-0010: min_sys_div: 2 [ 17.851510] imx214 4-0010: min_sys_div: max_vt_pix_clk_div: 2 [ 17.851518] imx214 4-0010: min_sys_div: max_pll_op_clk_freq_hz: 2 [ 17.851526] imx214 4-0010: min_sys_div: one or even: 2 [ 17.851534] imx214 4-0010: max_sys_div: 4 [ 17.851541] imx214 4-0010: max_sys_div: min_vt_pix_clk_div: 4 [ 17.851549] imx214 4-0010: max_sys_div: min_vt_pix_clk_freq_hz: 4 [ 17.851557] imx214 4-0010: pix_div 3 too small or too big (5--10) [ 17.851568] imx214 4-0010: ext_clk_freq_hz 24000000 [ 17.851578] imx214 4-0010: vt_pre_pll_clk_div 1 [ 17.851587] imx214 4-0010: vt_pll_multiplier 50 [ 17.851595] imx214 4-0010: vt_pll_ip_clk_freq_hz 24000000 [ 17.851603] imx214 4-0010: vt_pll_op_clk_freq_hz 1200000000 [ 17.851612] imx214 4-0010: vt_sys_clk_div 2 [ 17.851620] imx214 4-0010: vt_pix_clk_div 5 [ 17.851629] imx214 4-0010: vt_sys_clk_freq_hz 600000000 [ 17.851637] imx214 4-0010: vt_pix_clk_freq_hz 120000000 [ 17.851645] imx214 4-0010: op_sys_clk_div 1 [ 17.851653] imx214 4-0010: op_pix_clk_div 10 [ 17.851661] imx214 4-0010: op_sys_clk_freq_hz 1200000000 [ 17.851669] imx214 4-0010: op_pix_clk_freq_hz 120000000 [ 17.851677] imx214 4-0010: pixel rate in pixel array: 480000000 [ 17.851685] imx214 4-0010: pixel rate on CSI-2 bus: 480000000 [ 17.851694] imx214 4-0010: flags lane-speed [ 17.869313] imx214 4-0010: vt_lanes: 4 [ 17.869342] imx214 4-0010: op_lanes: 4 [ 17.869352] imx214 4-0010: binning: 1x1 [ 17.869361] imx214 4-0010: min / max op_pre_pll_clk_div: 1 / 15 [ 17.869372] imx214 4-0010: pre-pll check: min / max op_pre_pll_clk_div: 1 / 15 [ 17.869382] imx214 4-0010: mul 50 / div 1 [ 17.869391] imx214 4-0010: pll_op check: min / max op_pre_pll_clk_div: 1 / 15 [ 17.869400] imx214 4-0010: op_pre_pll_clk_div 1 [ 17.869409] imx214 4-0010: more_mul_max: max_op_pll_multiplier check: 24 [ 17.869417] imx214 4-0010: more_mul_max: max_pll_op_clk_freq_hz check: 1 [ 17.869426] imx214 4-0010: more_mul_max: max_op_sys_clk_div check: 1 [ 17.869435] imx214 4-0010: more_mul_max: min_pll_multiplier check: 1 [ 17.869443] imx214 4-0010: more_mul_min: min_op_pll_op_clk_freq_hz check: 1 [ 17.869451] imx214 4-0010: more_mul_min: min_op_pll_multiplier check: 1 [ 17.869460] imx214 4-0010: more_mul_factor: 1 [ 17.869468] imx214 4-0010: more_mul_factor: min_op_sys_clk_div: 1 [ 17.869476] imx214 4-0010: final more_mul: 1 [ 17.869483] imx214 4-0010: op_sys_clk_div: 1 [ 17.869491] imx214 4-0010: op_pix_clk_div: 10 [ 17.869501] imx214 4-0010: min_vt_div: 10 [ 17.869509] imx214 4-0010: min_vt_div: max_vt_pix_clk_freq_hz: 10 [ 17.869517] imx214 4-0010: min_vt_div: min_vt_clk_div: 10 [ 17.869525] imx214 4-0010: max_vt_div: 40 [ 17.869533] imx214 4-0010: max_vt_div: min_vt_pix_clk_freq_hz: 40 [ 17.869541] imx214 4-0010: min_sys_div: 2 [ 17.869549] imx214 4-0010: min_sys_div: max_vt_pix_clk_div: 2 [ 17.869557] imx214 4-0010: min_sys_div: max_pll_op_clk_freq_hz: 2 [ 17.869565] imx214 4-0010: min_sys_div: one or even: 2 [ 17.869572] imx214 4-0010: max_sys_div: 4 [ 17.869580] imx214 4-0010: max_sys_div: min_vt_pix_clk_div: 4 [ 17.869588] imx214 4-0010: max_sys_div: min_vt_pix_clk_freq_hz: 4 [ 17.869596] imx214 4-0010: pix_div 3 too small or too big (5--10) [ 17.869607] imx214 4-0010: ext_clk_freq_hz 24000000 [ 17.869616] imx214 4-0010: vt_pre_pll_clk_div 1 [ 17.869624] imx214 4-0010: vt_pll_multiplier 50 [ 17.869633] imx214 4-0010: vt_pll_ip_clk_freq_hz 24000000 [ 17.869642] imx214 4-0010: vt_pll_op_clk_freq_hz 1200000000 [ 17.869651] imx214 4-0010: vt_sys_clk_div 2 [ 17.869659] imx214 4-0010: vt_pix_clk_div 5 [ 17.869667] imx214 4-0010: vt_sys_clk_freq_hz 600000000 [ 17.869675] imx214 4-0010: vt_pix_clk_freq_hz 120000000 [ 17.869684] imx214 4-0010: op_sys_clk_div 1 [ 17.869692] imx214 4-0010: op_pix_clk_div 10 [ 17.869699] imx214 4-0010: op_sys_clk_freq_hz 1200000000 [ 17.869707] imx214 4-0010: op_pix_clk_freq_hz 120000000 [ 17.869716] imx214 4-0010: pixel rate in pixel array: 480000000 [ 17.869724] imx214 4-0010: pixel rate on CSI-2 bus: 480000000 [ 17.869732] imx214 4-0010: flags lane-speed
