在 5/8/2025 10:40 PM, Konrad Dybcio 写道:
On 5/7/25 12:26 PM, Lijuan Gao wrote:
From: Kyle Deng <quic_chunk...@quicinc.com>
The Shared Memory Point to Point (SMP2P) protocol facilitates
communication of a single 32-bit value between two processors.
Add these two nodes for remoteproc enablement on QCS615 SoC.
Signed-off-by: Kyle Deng <quic_chunk...@quicinc.com>
Signed-off-by: Lijuan Gao <quic_liju...@quicinc.com>
---
arch/arm64/boot/dts/qcom/qcs615.dtsi | 43 ++++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi
b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index 7c377f3402c1..53661e3a852e 100644
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -332,6 +332,49 @@ mc_virt: interconnect-2 {
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ smp2p-adsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <443>, <429>;
+ interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&apss_shared 26>;
26 will poke at the SLPI instead
SLPI has not been enabled in QCS615, so the sensor will be in ADSP. And
26 is being used dowstream, so it should be correct.
Konrad
--
Thx and BRs
Lijuan Gao
