On 5/16/2025 9:34 PM, Sean Christopherson wrote:
> On Mon, Mar 24, 2025, Mingwei Zhang wrote:
>> +static void amd_pmu_update_msr_intercepts(struct kvm_vcpu *vcpu)
>> +{
>> + struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
>> + struct vcpu_svm *svm = to_svm(vcpu);
>> + int msr_clear = !!(kvm_mediated_pmu_enabled(vcpu));
>> + int i;
>> +
>> + for (i = 0; i < min(pmu->nr_arch_gp_counters, AMD64_NUM_COUNTERS); i++)
>> {
>> + /*
>> + * Legacy counters are always available irrespective of any
>> + * CPUID feature bits and when X86_FEATURE_PERFCTR_CORE is set,
>> + * PERF_LEGACY_CTLx and PERF_LEGACY_CTRx registers are mirrored
>> + * with PERF_CTLx and PERF_CTRx respectively.
>> + */
>> + set_msr_interception(vcpu, svm->msrpm, MSR_K7_EVNTSEL0 + i, 0,
>> 0);
> This is pointless. Simply do nothing and KVM will always intercept event
> selectors.
Yes.
