On Fri, Jan 09, 2026 at 04:14:34PM +0100, Luca Weiss wrote: > Without the correct clock votes set, we may be hitting a synchronous > external abort error when touching the lpi registers. > > Internal error: synchronous external abort: 0000000096000010 [#1] SMP > <...> > Call trace: > lpi_gpio_read.isra.0+0x2c/0x58 (P) > pinmux_enable_setting+0x218/0x300 > pinctrl_commit_state+0xb0/0x280 > pinctrl_select_state+0x28/0x48 > pinctrl_bind_pins+0x1f4/0x2a0 > really_probe+0x64/0x3a8 > > Add the clocks to fix that. > > Platforms with this SoC using AudioReach won't be impacted due to > qcs6490-audioreach.dtsi already setting clocks & clock-names for > q6prmcc. The sc7280-chrome-common.dtsi has also been adjusted to keep > the behavior the same as they also do not use Elite with q6afecc. > > Signed-off-by: Luca Weiss <[email protected]> > --- > This issue is somewhat of a race condition, with some kernel configs it > cannot (easily) be triggered, with others relatively reliably but it > seems also to be somewhat related to cold boot. > > Also I can't pinpoint a good Fixes tag, lpass_tlmm was introduced before > q6afecc got added for this SoC, and that worked fine for those boards it > seems. It's just needed on boards with Elite audio architecture.
Yeah... If those clocks are not necessary for Chrome, then I'd pick up the q6afecc introduction as a Fixes tag. > --- > arch/arm64/boot/dts/qcom/kodiak.dtsi | 5 +++++ > arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 5 +++++ > 2 files changed, 10 insertions(+) > Reviewed-by: Dmitry Baryshkov <[email protected]> -- With best wishes Dmitry
