Add auxiliary reset driver to support StarFive JHB100 SoC. Signed-off-by: Changhuang Liang <[email protected]> --- MAINTAINERS | 6 + drivers/reset/starfive/Kconfig | 9 ++ drivers/reset/starfive/Makefile | 1 + .../reset/starfive/reset-starfive-jhb100.c | 121 ++++++++++++++++++ 4 files changed, 137 insertions(+) create mode 100644 drivers/reset/starfive/reset-starfive-jhb100.c
diff --git a/MAINTAINERS b/MAINTAINERS index 3af9d79b7daf..4ddf8ba2e60d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -25319,6 +25319,12 @@ L: [email protected] S: Maintained F: arch/riscv/boot/dts/starfive/jhb100* +STARFIVE JHB100 RESET CONTROLLER DRIVERS +M: Changhuang Liang <[email protected]> +S: Maintained +F: drivers/reset/starfive/reset-starfive-jhb1* +F: include/dt-bindings/reset/starfive,jhb1*.h + STATIC BRANCH/CALL M: Peter Zijlstra <[email protected]> M: Josh Poimboeuf <[email protected]> diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig index 29fbcf1a7d83..6f9a0f24f9b9 100644 --- a/drivers/reset/starfive/Kconfig +++ b/drivers/reset/starfive/Kconfig @@ -19,3 +19,12 @@ config RESET_STARFIVE_JH7110 default ARCH_STARFIVE help This enables the reset controller driver for the StarFive JH7110 SoC. + +config RESET_STARFIVE_JHB100 + bool "StarFive JHB100 Reset Driver" + depends on CLK_STARFIVE_JHB100_SYS0 + select AUXILIARY_BUS + select RESET_STARFIVE_COMMON + default ARCH_STARFIVE + help + This enables the reset controller driver for the StarFive JHB100 SoC. diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile index 582e4c160bd4..217002302a9f 100644 --- a/drivers/reset/starfive/Makefile +++ b/drivers/reset/starfive/Makefile @@ -3,3 +3,4 @@ obj-$(CONFIG_RESET_STARFIVE_COMMON) += reset-starfive-common.o obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o obj-$(CONFIG_RESET_STARFIVE_JH7110) += reset-starfive-jh7110.o +obj-$(CONFIG_RESET_STARFIVE_JHB100) += reset-starfive-jhb100.o diff --git a/drivers/reset/starfive/reset-starfive-jhb100.c b/drivers/reset/starfive/reset-starfive-jhb100.c new file mode 100644 index 000000000000..ab5e0f2a684f --- /dev/null +++ b/drivers/reset/starfive/reset-starfive-jhb100.c @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Reset driver for the StarFive JHB110 SoC + * + * Copyright (C) 2024 StarFive Technology Co., Ltd. + */ + +#include <dt-bindings/reset/starfive,jhb100-crg.h> +#include <linux/auxiliary_bus.h> +#include <soc/starfive/reset-starfive-common.h> + +#include "reset-starfive-common.h" + +#define NUM_RESETS(x) ((x) + 1) + +struct jhb100_reset_info { + unsigned int nr_resets; + unsigned int assert_offset; + unsigned int status_offset; +}; + +static const struct jhb100_reset_info jhb100_sys0_info = { + .nr_resets = NUM_RESETS(JHB100_SYS0RST_BMCUSB_RSTN_CRG), + .assert_offset = 0x12c, + .status_offset = 0x130, +}; + +static const struct jhb100_reset_info jhb100_sys1_info = { + .nr_resets = NUM_RESETS(JHB100_SYS1RST_BMCPERIPH3_RSTN_BUS), + .assert_offset = 0x54, + .status_offset = 0x58, +}; + +static const struct jhb100_reset_info jhb100_sys2_info = { + .nr_resets = NUM_RESETS(JHB100_SYS2RST_GPU1_HOST_PCIE_RST_N), + .assert_offset = 0x88, + .status_offset = 0x8c, +}; + +static const struct jhb100_reset_info jhb100_periph0_info = { + .nr_resets = NUM_RESETS(JHB100_PER0RST_UART_MUX_REG_WRAP), + .assert_offset = 0x554, + .status_offset = 0x560, +}; + +static const struct jhb100_reset_info jhb100_periph1_info = { + .nr_resets = NUM_RESETS(JHB100_PER1RST_MAIN_RSTN_PERIPH1_RAS), + .assert_offset = 0x134, + .status_offset = 0x138, +}; + +static const struct jhb100_reset_info jhb100_periph2_info = { + .nr_resets = NUM_RESETS(JHB100_PER2RST_MAIN_RSTN_PERIPH2_SENSORS), + .assert_offset = 0x11c, + .status_offset = 0x120, +}; + +static const struct jhb100_reset_info jhb100_periph3_info = { + .nr_resets = NUM_RESETS(JHB100_PER3RST_IOMUX_PRESETN), + .assert_offset = 0x98, + .status_offset = 0x9c, +}; + +static int jhb100_reset_probe(struct auxiliary_device *adev, + const struct auxiliary_device_id *id) +{ + struct jhb100_reset_info *info = (struct jhb100_reset_info *)(id->driver_data); + struct starfive_reset_adev *rdev = to_starfive_reset_adev(adev); + void __iomem *base = rdev->base; + + if (!info || !base) + return -ENODEV; + + return reset_starfive_register(&adev->dev, adev->dev.parent->of_node, + base + info->assert_offset, + base + info->status_offset, + NULL, info->nr_resets, NULL); +} + +static const struct auxiliary_device_id jhb100_reset_ids[] = { + { + .name = "clk_starfive_jhb100_sys0.r-sys0", + .driver_data = (kernel_ulong_t)&jhb100_sys0_info, + }, + { + .name = "clk_starfive_jhb100_sys0.r-sys1", + .driver_data = (kernel_ulong_t)&jhb100_sys1_info, + }, + { + .name = "clk_starfive_jhb100_sys0.r-sys2", + .driver_data = (kernel_ulong_t)&jhb100_sys2_info, + }, + { + .name = "clk_starfive_jhb100_sys0.r-per0", + .driver_data = (kernel_ulong_t)&jhb100_periph0_info, + }, + { + .name = "clk_starfive_jhb100_sys0.r-per1", + .driver_data = (kernel_ulong_t)&jhb100_periph1_info, + }, + { + .name = "clk_starfive_jhb100_sys0.r-per2", + .driver_data = (kernel_ulong_t)&jhb100_periph2_info, + }, + { + .name = "clk_starfive_jhb100_sys0.r-per3", + .driver_data = (kernel_ulong_t)&jhb100_periph3_info, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(auxiliary, jhb100_reset_ids); + +static struct auxiliary_driver jhb100_reset_driver = { + .probe = jhb100_reset_probe, + .id_table = jhb100_reset_ids, +}; +module_auxiliary_driver(jhb100_reset_driver); + +MODULE_AUTHOR("Changhuang Liang <[email protected]>"); +MODULE_DESCRIPTION("StarFive JHB100 reset driver"); +MODULE_LICENSE("GPL"); -- 2.25.1
