On 4/21/26 12:59 PM, Mark Brown wrote:
On Mon, Apr 20, 2026 at 04:39:58PM -0300, Val Packett wrote:
The aw88261 driver only worked with 32-bit 48kHz streams so far due to
the lack of a proper PLL initialization sequence. Fix by selecting all
the necessary PLL settings based on what was passed to us in the
hw_params DAI callback. This replaces the strange downstream routine
that tries two divider modes in sequence.
+static int aw88261_dev_configure_syspll(struct aw88261 *aw88261)
{
+ switch (aw88261->sample_rate) {
+ case 8000:
+ case 16000:
+ case 32000:
+ case 44100:
+ case 48000:
+ case 96000:
+ case 192000:
...
+ default:
+ dev_err(aw_dev->dev, "unsupported sample rate %d\n",
+ aw88261->sample_rate);
+ return -EINVAL;
}
The driver advertises more rats than this, including 11.025kHz, 12kHz
and multiples thereof. It's unlikely anything would actually *use* them
but it'd be better to update the constraints.
Oops, I never realized that SNDRV_PCM_RATE_8000_48000 includes so much
"unreasonable" junk!
Ack.
I thought of updating the rates to include 192000 but I'm not sure how
actually supported it is. The definition for it is present in downstream
headers, but the datasheet for the AW88258 mentions 96 kHz as the
largest rate, and I couldn't find a datasheet for the 88261 itself..
~val
