On Fri, Apr 24, 2026 at 11:20:25AM +0800, Xingyu Wu wrote: > Add the new documentation of hardware spinlock for the StarFive JHB100 SoC. > > Signed-off-by: Xingyu Wu <[email protected]> > --- > .../hwlock/starfive,jhb100-hwspinlock.yaml | 40 +++++++++++++++++++ > 1 file changed, 40 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/hwlock/starfive,jhb100-hwspinlock.yaml > > diff --git > a/Documentation/devicetree/bindings/hwlock/starfive,jhb100-hwspinlock.yaml > b/Documentation/devicetree/bindings/hwlock/starfive,jhb100-hwspinlock.yaml > new file mode 100644 > index 000000000000..b1b27fafe9bc > --- /dev/null > +++ b/Documentation/devicetree/bindings/hwlock/starfive,jhb100-hwspinlock.yaml > @@ -0,0 +1,40 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/hwlock/starfive,jhb100-hwspinlock.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: StarFive Hardware Spinlock > + > +maintainers: > + - Xingyu Wu <[email protected]> > + > +properties: > + compatible: > + const: starfive,jhb100-hwspinlock > + > + reg: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + "#hwlock-cells": > + const: 1
Does this peripheral not have a clock?
Seems unlikely to me that it doesnt.
> +
> +required:
> + - compatible
> + - reg
> + - resets
> + - "#hwlock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + hwspinlock@13012000 {
> + compatible = "starfive,jhb100-hwspinlock";
> + reg = <0x13012000 0x400>;
> + resets = <&sys0crg 0>;
> + #hwlock-cells = <1>;
> + };
> --
> 2.34.1
>
>
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