Add the description of the IPA block in the SM8450 SoC.

Co-developed-by: Nazar Kompanets <[email protected]>
Signed-off-by: Nazar Kompanets <[email protected]>
Signed-off-by: Esteban Urrutia <[email protected]>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 59 +++++++++++++++++++++++++++++++-----
 1 file changed, 52 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi 
b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index b8793482b181..95b6fd22a846 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -2625,6 +2625,47 @@ adreno_smmu: iommu@3da0000 {
                        dma-coherent;
                };
 
+               ipa: ipa@3f40000 {
+                       compatible = "qcom,sm8450-ipa";
+
+                       reg = <0 0x3f40000 0 0x10000>,
+                             <0 0x3f50000 0 0x5000>,
+                             <0 0x3e04000 0 0xfc000>;
+                       reg-names = "ipa-reg",
+                                   "ipa-shared",
+                                   "gsi";
+                       iommus = <&apps_smmu 0x5c0 0x0>,
+                                <&apps_smmu 0x5c2 0x0>;
+
+                       interrupts-extended = <&intc GIC_SPI 654 
IRQ_TYPE_EDGE_RISING>,
+                                             <&intc GIC_SPI 432 
IRQ_TYPE_LEVEL_HIGH>,
+                                             <&ipa_smp2p_in 0 
IRQ_TYPE_EDGE_RISING>,
+                                             <&ipa_smp2p_in 1 
IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "ipa",
+                                         "gsi",
+                                         "ipa-clock-query",
+                                         "ipa-setup-ready";
+
+                       clocks = <&rpmhcc RPMH_IPA_CLK>;
+                       clock-names = "core";
+
+                       interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt 
SLAVE_EBI1 0>,
+                                       <&gem_noc MASTER_APPSS_PROC 0 
&config_noc SLAVE_IPA_CFG 0>;
+                       interconnect-names = "memory",
+                                            "config";
+
+                       qcom,qmp = <&aoss_qmp>;
+
+                       qcom,smem-states = <&ipa_smp2p_out 0>,
+                                          <&ipa_smp2p_out 1>;
+                       qcom,smem-state-names = "ipa-clock-enabled-valid",
+                                               "ipa-clock-enabled";
+
+                       sram = <&ipa_modem_tables>;
+
+                       status = "disabled";
+               };
+
                usb_1_hsphy: phy@88e3000 {
                        compatible = "qcom,sm8450-usb-hs-phy",
                                     "qcom,usb-snps-hs-7nm-phy";
@@ -4957,21 +4998,25 @@ cti@13900000 {
                        clock-names = "apb_pclk";
                };
 
-               sram@146aa000 {
+               sram@14680000 {
                        compatible = "qcom,sm8450-imem", "syscon", "simple-mfd";
-                       reg = <0 0x146aa000 0 0x1000>;
-                       ranges = <0 0 0x146aa000 0x1000>;
+                       reg = <0 0x14680000 0 0x40000>;
+                       ranges = <0 0 0x14680000 0x40000>;
 
                        #address-cells = <1>;
                        #size-cells = <1>;
 
-                       minidump_config: minidump-sram@1c {
-                               reg = <0x1c 0x4>;
+                       ipa_modem_tables: modem-tables@28000 {
+                               reg = <0x28000 0x2000>;
+                       };
+
+                       minidump_config: minidump-sram@2a01c {
+                               reg = <0x2a01c 0x4>;
                        };
 
-                       pil-reloc@94c {
+                       pil-reloc@2a94c {
                                compatible = "qcom,pil-reloc-info";
-                               reg = <0x94c 0xc8>;
+                               reg = <0x2a94c 0xc8>;
                        };
                };
 

-- 
2.55.0



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