On Tue, Sep 22, 2026 at 10:00:39AM -0700, Oliver Upton wrote:
> On Tue, Sep 22, 2026 at 03:17:56PM +0100, Lorenzo Stoakes (ARM) wrote:
> > Add helper functions which operate directly on an ESR value rather than
> > trying to access the register itself.
> >
> > These mirror equivalent KVM vCPU wrappers in kvm_emulate.h and allow those
> > wrappers and KVM's stage-2 fault handling to operate on a plain ESR value.
> >
> > This is needed to later generate a synthetic fault for the stage-2 page
> > table pre-faulting mechanism.
> >
> > No functional change intended.
> >
> > Signed-off-by: Lorenzo Stoakes (ARM) <[email protected]>
> > ---
> > arch/arm64/include/asm/esr.h | 44
> > ++++++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 44 insertions(+)
> >
> > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
> > index f816f5d77f1a..9c0205983d9a 100644
> > --- a/arch/arm64/include/asm/esr.h
> > +++ b/arch/arm64/include/asm/esr.h
> > @@ -437,6 +437,50 @@
> > #ifndef __ASSEMBLER__
> > #include <asm/types.h>
> >
> > +static __always_inline u8 esr_get_ec(unsigned long esr)
> > +{
> > + return ESR_ELx_EC(esr);
> > +}
>
> Why do we need to wrap the macro in an inline function?
It seemed like a more consistent way of doing this but looking through the code
ESR_ELx_EC() is referenced directly in quite a few places so will swap out.
>
> > +static __always_inline bool esr_trap_is_iabt(unsigned long esr)
> > +{
> > + return esr_get_ec(esr) == ESR_ELx_EC_IABT_LOW;
> > +}
> > +
> > +static __always_inline bool esr_abt_is_s1ptw(unsigned long esr)
> > +{
> > + return esr & ESR_ELx_S1PTW;
> > +}
>
> This helper doesn't make a ton of sense outside of KVM, since
> ESR_ELx.S1PTW is RES0 (not RAZ) outside of a stage-2 abort.
OK, kvm_emulate.h better?
>
> Thanks,
> Oliver
--
Cheers, Lorenzo
