On Wed, Sep 30, 2026 at 10:48:23PM +0100, Mark Brown wrote: > When EXLOCK is enabled for ELx writes to SPSR_ELx and ELR_ELx generate > GCS exceptions. Currently the selftest helpers unconditionally reload the > saved values for these registers regardless of if the handler didn't change > them. This gets in the way of EXLOCK testing, making it hard to generate > contexts which will generate an invalid ERET since we never get as far as > doing an exception return while EXLOCK is enabled.
Sounds reasonable. > > In order to facilitate testing of nested virtualisation emulation of EXLOCK > change our reloads into read/modify/write cycles, suppressing the writes > when they would not change the value in the register. Also sounds sensible. > > Reviewed-by: Leonardo Bras <[email protected]> > Signed-off-by: Mark Brown <[email protected]> Also looks obviously correct (TM) to me so: Reviewed-by: Lorenzo Stoakes (ARM) <[email protected]> > --- > tools/testing/selftests/kvm/lib/arm64/handlers.S | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/tools/testing/selftests/kvm/lib/arm64/handlers.S > b/tools/testing/selftests/kvm/lib/arm64/handlers.S > index 0e443eadfac6..367c22d61cba 100644 > --- a/tools/testing/selftests/kvm/lib/arm64/handlers.S > +++ b/tools/testing/selftests/kvm/lib/arm64/handlers.S > @@ -33,8 +33,18 @@ > > .macro restore_registers > ldp x1, x2, [sp, #16 * 16] /* PC, PSTATE */ > + > + /* Suppress redundant writes to support GCS exception lock testing */ > + mrs x3, elr_el1 > + cmp x1, x3 > + beq .Lskip_elr_\@ > msr elr_el1, x1 > +.Lskip_elr_\@: > + mrs x3, spsr_el1 > + cmp x2, x3 > + beq .Lskip_spsr_\@ Even as an arm64 assembly novice I can see what this is doing :) > msr spsr_el1, x2 > +.Lskip_spsr_\@: > > /* sp is not restored */ > ldp x30, xzr, [sp, #16 * 15] /* x30, SP */ > > -- > 2.47.3 > > -- Cheers, Lorenzo
