Hi Zhanpeng Zhang, On Fri, 11 Sep 2026, Zhanpeng Zhang wrote:
> RISC-V does not architecturally define a supervisor-mode non-maskable > interrupt (NMI). An interrupt that arrives while Linux has cleared SIE stays > pending and is not observed until interrupts are enabled again. That is > correct for ordinary interrupt handling, but some kernel work needs an > NMI-like notification that can run even inside an interrupt-disabled region: > sampling a PMU overflow at the instruction that caused it, or taking a > high-priority RAS report promptly, cannot wait for the next unmask boundary. > > The SBI Supervisor Software Events (SSE) extension [1] fills this gap. It lets > Linux register handlers for events that the SBI implementation can deliver > ahead of ordinary traps and interrupts, giving RISC-V the NMI-like supervisor > notification mechanism it otherwise lacks. Thanks for taking this series forward. Could you please rebase this series against the current riscv/for-next branch and repost? I tried pulling the series in, but it needs quite a few updates since we've queued up quite a few patches that touch SBI. thanks, - Paul
