In article <[EMAIL PROTECTED]>,
Peter Horton <[EMAIL PROTECTED]> wrote:
> + * VIA VT8363 host bridge has broken feature 'PCI Master Read
> + * Caching'. It caches more than is good for it, sometimes
> + * serving the bus master with stale data. Some BIOSes enable
> + * it by default, so we disable it.
Another data point:
I have an ASUS A7V motherboard with via vt82c686a and Promise pdc20265
IDE controllers. I noticed disk data corruption when I enabled DMA.
The corrupted data was 4K bytes long on 4K byte boundaries and occurred
about once for every couple of gigabytes copied via cpio.
I saw this corruption when the disks were connected to the pdc20265
as well as to the 686a.
I also noticed that turning off read caching eliminated the corruption.
However, if I enable the BIOS parameter "I/O Recovery Time", I can still
enable read caching without seeing any data corruption.
The lastest BIOS revision (1005C) enables "I/O Recovery Time" by default
where the previous revision I had (1004D) did not.
-Dale
--
Dale Farnsworth [EMAIL PROTECTED]
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