From: Hein Tibosch <hein_tibo...@yahoo.es> v4: now based and tested on 3.6-rc4
The MCI makes use of the dw_dmac driver when DMA is being used. Due to recent changes to dw_dmac the MCI+DMA driver was broken because: - a patch in dw_dmac allowed for 64-bit transfers on the memory side, giving an illegal value of 3 in the SRC/DST_TR_WIDTH register (http://lkml.org/lkml/2012/1/18/52) - the SMS field in the CTLL register received the wrong value 0 This patch sets the SMS (Source Master Select) to 1 and limits the maximum transfer width to 32 bits. Note: this can only be applied after the previous: [PATCH v3 2/3] dw_dmac: max_mem_width limits value for SRC/DST_TR_WID register Signed-off-by: Hein Tibosch <hein_tibo...@yahoo.es> Acked-by: Hans-Christian Egtvedt <egtv...@samfundet.no> --- arch/avr32/mach-at32ap/at32ap700x.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index 0445c4f..33c56e7 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c @@ -1355,6 +1355,10 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data) | DWC_CFGH_DST_PER(1)); slave->sdata.cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); + /* Setup DMA controller: let source be master */ + slave->sdata.src_master = 1; + /* Limit maximum transfer width to 32-bit */ + slave->sdata.max_mem_width = DW_MEM_WIDTH_32; data->dma_slave = slave; -- 1.7.8.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
