3.5.7.3 -stable review patch.  If anyone has any objections, please let me know.

------------------

From: Daniel Vetter <[email protected]>

commit 607a6f7a6621f65706ff536b2615ee65b5c2f575 upstream.

Jani Nikula noticed that the parentheses are wrong and we & the bit
with the register address instead of the read-back value. He sent a
patch to correct that.

On second look, we write the same register in the previous line, and
the w/a seems to be to set FDI_RX_PHASE_SYNC_POINTER_OVR to enable the
logic, then keep always set FDI_RX_PHASE_SYNC_POINTER_OVR and toggle
FDI_RX_PHASE_SYNC_POINTER_EN before/after enabling the pc transcoder.

So the right things seems to be to simply kill the 2nd write.

Cc: Jani Nikula <[email protected]>
Reviewed-by: Chris Wilson <[email protected]>
[danvet: Dropped a bogus ~ from the commit message that somehow crept
in.]
Signed-off-by: Daniel Vetter <[email protected]>
[ herton: this looks a good bug fix, which also makes the next patch,
 "drm/i915: disable cpt phase pointer fdi rx workaround", easier to apply ]
Signed-off-by: Herton Ronaldo Krzesinski <[email protected]>
---
 drivers/gpu/drm/i915/intel_display.c |    3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index c69444a..98ea04e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2609,9 +2609,6 @@ static void ironlake_fdi_disable(struct drm_crtc *crtc)
        /* Ironlake workaround, disable clock pointer after downing FDI */
        if (HAS_PCH_IBX(dev)) {
                I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR);
-               I915_WRITE(FDI_RX_CHICKEN(pipe),
-                          I915_READ(FDI_RX_CHICKEN(pipe) &
-                                    ~FDI_RX_PHASE_SYNC_POINTER_EN));
        } else if (HAS_PCH_CPT(dev)) {
                cpt_phase_pointer_disable(dev, pipe);
        }
-- 
1.7.9.5

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