On Sat, Jan 05, 2013 at 05:34:46PM +0530, Laxman Dewangan wrote: > NVIDIA's Tegra114 has following enhanced feature in i2c controller: > - Enable/disable control for per packet transfer complete interrupt. > Earlier SoCs could not disable this. > - Single clock source for standard/fast and HS mode clock speed. > The clock divisor for fast/standard mode is added into the i2c > controller to meet the HS and standard/fast mode of clock speed > from single source. > > Add support for the above feature to make it functional on T114 SOCs.
Thanks, applied to next. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
