Hi Mike, On Sat, Jan 26, 2013 at 03:50:32, Mike Turquette wrote:
> Is MULT_ROUND_UP doing the right thing for you in the clk_divider code? > What is the clock rate requested of the parent PLL? I just want to make > sure that we're doing the right thing in the basic divider code. Actually MULT_ROUND_UP made my life difficult earlier, and finally came up with this solution instead of removing it. It was something like 60000000 requested of PLL, for i = 1, but for other values, it was something like 60000001, 60000002 etc. Even if round rate rounds, I thought removing MULT_ROUND_UP would be ok, couldn't spend time to understand fully rational behind it, and as it was in generic code, kept away from doing it. Regards Afzal
