Hi Ian, On Tue, Mar 05, 2013 at 09:29:57AM +0000, Ian Campbell wrote: > On Tue, 2013-03-05 at 08:08 +0000, Will Deacon wrote: > > Cheers Rob, that was enough to reproduce for me. The problem is likely that > > CONFIG_AEABI=n, so the ABI doesn't actually mandate even base registers for > > 64-bit values in registers. > > Me too. > > > Ian -- this would be fixed if you used our atomic64 routines instead of > > inventing your own :) > > I looked and couldn't see an existing 64 bit xchg, was I looking in the > wrong place? Ah, wait, I see atomic64_xchg now. But that needs an > atomic64_t while I have a xen_ulong_t (which == 64 bits on ARM). This is > a kernel<->hypervisor ABI so I can't just change it to an atomic64_t. I > suppose I could cast (see below, untested) but that seems rather icky.
You can play some container_of tricks, like we do in cmpxchg64 to get this right. Alternatively, we could look at an xchg8 implementation which some other architectures have (although they seem to be 64-bit machines). Will -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/