On Tue, 2013-04-09 at 10:23 -0500, Jacob Shin wrote: > Upcoming AMD Family 16h Processors provide 4 new performance counters > to count L2 related events. Similar to northbridge counters, these new > counters are shared across multiple CPUs that share the same L2 cache. > This patchset adds support for these new counters and enforces sharing > by leveraging the existing sharing logic used for the northbridge > counters.
If they're separate counters -- not shared with the regular cpu counters like the 10h NB counters are, then they should have their own PMU driver. Similar to the 15h NB counters; which are a separate set of counters and no longer overlay the normal counters. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
