Commit-ID: af80b0fed67261dcba2ce2406db1d553d07cbe75 Gitweb: http://git.kernel.org/tip/af80b0fed67261dcba2ce2406db1d553d07cbe75 Author: Gerlando Falauto <[email protected]> AuthorDate: Mon, 6 May 2013 14:30:21 +0000 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 29 May 2013 10:57:10 +0200
genirq: Generic chip: Handle separate mask registers There are cases where all irq_chip_type instances have separate mask registers, making a shared mask register cache unsuitable for the purpose. Introduce a new flag IRQ_GC_MASK_CACHE_PER_TYPE. If set, point the per chip mask pointer to the per chip private mask cache instead. [ tglx: Simplified code, renamed flag and massaged changelog ] Signed-off-by: Gerlando Falauto <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Joey Oravec <[email protected]> Cc: Lennert Buytenhek <[email protected]> Cc: Russell King - ARM Linux <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Holger Brunck <[email protected]> Cc: Ezequiel Garcia <[email protected]> Acked-by: Grant Likely <[email protected]> Cc: Sebastian Hesselbarth <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: [email protected] Cc: Rob Herring <[email protected]> Cc: Ben Dooks <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Simon Guinot <[email protected]> Cc: [email protected] Cc: Thomas Petazzoni <[email protected]> Cc: Jean-Francois Moine <[email protected]> Cc: Nicolas Pitre <[email protected]> Cc: Rob Landley <[email protected]> Cc: Maxime Ripard <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]> --- include/linux/irq.h | 2 ++ kernel/irq/generic-chip.c | 17 ++++++++++------- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/include/linux/irq.h b/include/linux/irq.h index 38709a3..7f1f015 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -704,10 +704,12 @@ struct irq_chip_generic { * @IRQ_GC_INIT_NESTED_LOCK: Set the lock class of the irqs to nested for * irq chips which need to call irq_set_wake() on * the parent irq. Usually GPIO implementations + * @IRQ_GC_MASK_CACHE_PER_TYPE: Mask cache is chip type private */ enum irq_gc_flags { IRQ_GC_INIT_MASK_CACHE = 1 << 0, IRQ_GC_INIT_NESTED_LOCK = 1 << 1, + IRQ_GC_MASK_CACHE_PER_TYPE = 1 << 2, }; /* Generic chip callback functions */ diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index 113d9eb..da2a941 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -241,18 +241,21 @@ void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk, { struct irq_chip_type *ct = gc->chip_types; unsigned int i; + u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask; raw_spin_lock(&gc_lock); list_add_tail(&gc->list, &gc_list); raw_spin_unlock(&gc_lock); - /* Init mask cache ? */ - if (flags & IRQ_GC_INIT_MASK_CACHE) - gc->mask_cache = irq_reg_readl(gc->reg_base + ct->regs.mask); - - /* Initialize mask cache pointer */ - for (i = 0; i < gc->num_ct; i++) - ct[i].mask_cache = &gc->mask_cache; + for (i = 0; i < gc->num_ct; i++) { + if (flags & IRQ_GC_MASK_CACHE_PER_TYPE) { + mskptr = &ct[i].mask_cache_priv; + mskreg = ct[i].regs.mask; + } + ct[i].mask_cache = mskptr; + if (flags & IRQ_GC_INIT_MASK_CACHE) + *mskptr = irq_reg_readl(gc->reg_base + mskreg); + } for (i = gc->irq_base; msk; msk >>= 1, i++) { if (!(msk & 0x01)) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
