Oleksandr Dmytryshyn <oleksandr.dmytrys...@ti.com> writes: > Starting from the OMAP chips with version2 registers scheme there are > 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage > interrupts instead of the older OMAP chips with old scheme which have > only one register (I2C_IE). Now we should use I2C_IRQENABLE_SET > register for enabling interrupts and I2C_IRQENABLE_CLR register for > disabling interrupts.
Why? (changelogs should always answer the "why" question) IOW, what is broken without this change, how does it fail? And equally important, how is it currently working? Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
