On Mon, Jun 3, 2013 at 11:02 AM, Xiang Wang <wangx...@gmail.com> wrote:
> From: Xiang Wang <wa...@marvell.com>
>
> In mmp pdma, phy channels are allocated/freed dynamically.
> The mapping from DMA request to DMA channel number in DRCMR
> should be cleared when a phy channel is freed. Otherwise
> conflicts will happen when:
> 1. A is using channel 2 and free it after finished, but A
> still maps to channel 2 in DRCMR of A.
> 2. Now another one B gets channel 2. So B maps to channel 2
> too in DRCMR of B.
> In the datasheet, it is described that "Do not map two active
> requests to the same channel since it produces unpredictable
> results" and we can observe that during test.
> --- a/drivers/dma/mmp_pdma.c
> +++ b/drivers/dma/mmp_pdma.c
> @@ -252,9 +252,15 @@ static void free_phy(struct mmp_pdma_chan *pchan)
> {
> struct mmp_pdma_device *pdev = to_mmp_pdma_dev(pchan->chan.device);
> unsigned long flags;
> + u32 reg;
May be empty line here (and maybe even in previous patch)?
> if (!pchan->phy)
> return;
>
> + /* clear the channel mapping in DRCMR */
> + reg = pchan->phy->vchan->drcmr;
> + reg = (((reg) < 64) ? 0x0100 : 0x1100) + (((reg) & 0x3f) << 2);
Too many braces.
It is not a macro, you don't need to embrace reg.
> + writel(0, pchan->phy->base + reg);
> +
> spin_lock_irqsave(&pdev->phy_lock, flags);
> pchan->phy->vchan = NULL;
> pchan->phy = NULL;
--
With Best Regards,
Andy Shevchenko
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