On Fri, 7 Jun 2013, Paul Walmsley wrote:
> The IP block has an I2C controller embedded in it that autonomously sends
> set-voltage commands (across a range of voltages) to the PMIC. To enable
> that, the driver must first initialize the IP block with a
> voltage-to-selector table.
Here's the table loading code -
+/**
+ * _load_lut - load voltage lookup table into DFLL RAM
+ * @pdev: DFLL instance
+ *
+ * Load the voltage-to-PMIC register value lookup table into the DFLL
+ * IP block LUT memory. td->lut_min and td->lut_max are used to cap
+ * the minimum and maximum voltage requested. This function shouldn't
+ * be called directly by code other than dfll_load_lut(), since this
+ * function doesn't handle the necessary pre- and post-requisites. No
+ * return value.
+ */
+static void _load_lut(struct platform_device *pdev)
+{
+ struct tegra_dfll *td = dev_get_drvdata(&pdev->dev);
+ int i;
+ u32 val;
+
+ val = td->out_map[td->lut_min]->reg_value;
+ for (i = 0; i <= td->lut_min; i++)
+ dfll_writel(td, val, DFLL_OUTPUT_LUT + i * 4);
+
+ for (; i < td->lut_max; i++) {
+ val = td->out_map[i]->reg_value;
+ dfll_writel(td, val, DFLL_OUTPUT_LUT + i * 4);
+ }
+
+ val = td->out_map[td->lut_max]->reg_value;
+ for (; i < td->num_voltages; i++)
+ dfll_writel(td, val, DFLL_OUTPUT_LUT + i * 4);
+
+ dfll_wmb(td);
+}
- Paul
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