Hi Linus,

can you please look at this patchset?

Thanks,
Michal

On 06/03/2013 02:31 PM, Michal Simek wrote:
> Simplification is done by using OF helper function
> which increase readability of code and remove
> (if (var) var = be32_to_cpup;) assignment.
> 
> Signed-off-by: Michal Simek <michal.si...@xilinx.com>
> ---
> Changes in v2:
> - New patch in this series
> 
>  drivers/gpio/gpio-xilinx.c | 24 ++++++++++--------------
>  1 file changed, 10 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
> index 9ae7aa8..2aad534 100644
> --- a/drivers/gpio/gpio-xilinx.c
> +++ b/drivers/gpio/gpio-xilinx.c
> @@ -170,24 +170,20 @@ static int xgpio_of_probe(struct device_node *np)
>               return -ENOMEM;
> 
>       /* Update GPIO state shadow register with default value */
> -     tree_info = of_get_property(np, "xlnx,dout-default", NULL);
> -     if (tree_info)
> -             chip->gpio_state = be32_to_cpup(tree_info);
> +     of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state);
> +
> +     /* By default, all pins are inputs */
> +     chip->gpio_dir = 0xFFFFFFFF;
> 
>       /* Update GPIO direction shadow register with default value */
> -     chip->gpio_dir = 0xFFFFFFFF; /* By default, all pins are inputs */
> -     tree_info = of_get_property(np, "xlnx,tri-default", NULL);
> -     if (tree_info)
> -             chip->gpio_dir = be32_to_cpup(tree_info);
> +     of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir);
> +
> +     /* By default assume full GPIO controller */
> +     chip->mmchip.gc.ngpio = 32;
> 
>       /* Check device node and parent device node for device width */
> -     chip->mmchip.gc.ngpio = 32; /* By default assume full GPIO controller */
> -     tree_info = of_get_property(np, "xlnx,gpio-width", NULL);
> -     if (!tree_info)
> -             tree_info = of_get_property(np->parent,
> -                                         "xlnx,gpio-width", NULL);
> -     if (tree_info)
> -             chip->mmchip.gc.ngpio = be32_to_cpup(tree_info);
> +     of_property_read_u32(np, "xlnx,gpio-width",
> +                           (u32 *)&chip->mmchip.gc.ngpio);
> 
>       spin_lock_init(&chip->gpio_lock);
> 
> --
> 1.8.2.3
> 


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


Attachment: signature.asc
Description: OpenPGP digital signature

Reply via email to