On Wed, Jun 19, 2013 at 02:37:27PM -0700, David Daney wrote: > From: David Daney <[email protected]> > > A few differences needed by OCTEON: > > o These are DWC UARTS, but have USR at a different offset. > > o Internal SoC buses require reading back from registers to maintain > write ordering. > > o 8250 on OCTEON appears with 64-bit wide registers, so when using > readb/writeb in big endian mode we have to adjust the membase to hit > the proper part of the register. > > o No UCV register, so we hard code some properties. > > Because OCTEON doesn't have a UCV register, I change where > dw8250_setup_port(), which reads the UCV, is called by pushing it in > to the OF and ACPI probe functions, and move unchanged > dw8250_setup_port() earlier in the file. > > Signed-off-by: David Daney <[email protected]> > Acked-by: Greg Kroah-Hartman <[email protected]> > Cc: Arnd Bergmann <[email protected]> > Cc: Heikki Krogerus <[email protected]>
Reviewed-by: Heikki Krogerus <[email protected]> -- heikki -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
