At 13:42 -0600 20-06-2001, Charles Cazabon wrote:
>Rodrigo Ventura <[EMAIL PROTECTED]> wrote:
> > BTW, I have a question: Can the availability of dual-CPU boards for intel
>> and amd processors, rather then tri- or quadra-CPU boards, be explained with
>> the fact that the performance degrades significantly for three or more CPUs?
>> Or is there a technological and/or comercial reason behind?
>
>Commercial reasons. Cost per motherboard/chipset goes way up as the number of
>CPUs supported goes up. For each CPU that a chipset supports, it has to add a
>lot of pins/lands, and chipsets are already typically land-limited.
That's not quite accurate. Most modern SMP-able processors have a
common bus, where going from 1->2 CPUs adds just a handful of extra
nets (usually bus request, bus grant and some IRQs). The actual
issues are threefold.
First, most commodity chipsets simply support no more than two CPUs
at best; most CPUs don't support having more (or any) siblings.
Adding more is cheap on the ASIC level, but nobody bothers because
there is no demand.
Second, adding more CPUs on a shared bus decreases the bus bandwidth
that is available per CPU. This is comparable with having Ethernet
hubs vs switches. The really expensive multi-CPU boards have crossbar
switches between CPUs, memory and PCI. Future stuff like RapidIO may
mitigate this.
Third, the more CPUs a bus holds, the higher the capacitance on the
bus lines. Higher capacitance means lower maximum bus speed, which
aggravates point two.
>Motherboard trace complexity (and therefore number of layers) goes up. Add to
>that that the potential market goes down as CPUs goes up.
True enough.
Regards,
JDB
[working on a SMP PowerPC design]
--
LART. 250 MIPS under one Watt. Free hardware design files.
http://www.lart.tudelft.nl/
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