On 10/30/2013 02:07 PM, Russell King - ARM Linux wrote:
> On Wed, Oct 30, 2013 at 01:46:18PM +0100, Michal Simek wrote:
>> Russell, Will: We discussed this at KS that will be good
>> to rephrase it or have different logic around this.
>> I am not sure if we can also test that this bit is
>> implemented by particular SoC or not.
>>
>> Maybe logic should be that if SoC uses this bit
>> that message is shown in origin format to declare
>> that ECC is enabled or disabled.
>> When SoC doesn't implement it then do not show this message.
>
> This is not quite what I meant - by making the change you have, you also
> omit to print the data cache policy.
>
>> @@ -556,8 +556,9 @@ static void __init build_mem_type_table(void)
>> mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_WB;
>> break;
>> }
>> - printk("Memory policy: ECC %sabled, Data cache %s\n",
>> - ecc_mask ? "en" : "dis", cp->policy);
>> + if (ecc_mask)
>> + pr_info("Memory policy: ECC enabled, Data cache %s\n",
>> + cp->policy);
>
> pr_info("Memory policy: %sData cache %s\n",
> ecc_mask ? "ECC enabled, " : "", cp->policy);
>
> is more what I was suggesting.If this is what you would like to see it there, I am fine with that too. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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