On Mon, 18 Nov 2013, Thierry Reding wrote: > From: Derek Basehore <dbaseh...@chromium.org> > > 50 us is not a long enough delay between EC transactions. At least 70 us > are needed for the 16 MHz STM32L part. Increase the delay to 200 us for > an extra safety margin. > > Signed-off-by: Derek Basehore <dbaseh...@chromium.org> > Reviewed-by: Randall Spangler <rspang...@chromium.org> > Signed-off-by: Thierry Reding <tred...@nvidia.com> > --- > drivers/mfd/cros_ec_spi.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-)
As I'm sure you've tested this and you didn't notice any new undue latency, I'll apply the patch, thanks. -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
