On Fri, Jan 28, 2005 at 08:53:47AM -0600, [EMAIL PROTECTED] wrote: > > The IBM Citrine chipset has a feature that if PCI config register > 0xA0 is read while DMAs are being performed to it, there is the possiblity > that the parity will be wrong on the PCI bus, causing a parity error and > a master abort. On this chipset, this register is simply a debug register > for the chip developers and the registers after it are not defined. > Patch sets cfg_size to 0xA0 to prevent this problem from being seen. > > Signed-off-by: Brian King <[EMAIL PROTECTED]>
Applied, thanks. greg k-h - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
