Hi Geert, Thank you for the patch.
On Monday 10 February 2014 11:47:27 Geert Uytterhoeven wrote: > From: Geert Uytterhoeven <[email protected]> > > A QSPI function set consists of 3 groups: > - qspi_ctrl (2 control wires) > - qspi_data2 (2 data wires, for Single/Dual SPI) > - qspi_data4 (4 data wires, for Quad SPI) > > Signed-off-by: Geert Uytterhoeven <[email protected]> > Cc: Linus Walleij <[email protected]> > Cc: Laurent Pinchart <[email protected]> > --- > drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 33 +++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c > b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index c381ae63c508..bc9ced3ccd58 > 100644 > --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c > @@ -2389,6 +2389,29 @@ static const unsigned int msiof3_tx_pins[] = { > static const unsigned int msiof3_tx_mux[] = { > MSIOF3_TXD_MARK, > }; > +/* - QSPI -------------------------------------------------------------- */ > +static const unsigned int qspi_ctrl_pins[] = { > + /* SPCLK, SSL */ > + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 9), > +}; > +static const unsigned int qspi_ctrl_mux[] = { > + SPCLK_MARK, SSL_MARK, > +}; > +static const unsigned int qspi_data2_pins[] = { > + /* MOSI_IO0, MISO_IO1 */ > + RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), > +}; > +static const unsigned int qspi_data2_mux[] = { > + MOSI_IO0_MARK, MISO_IO1_MARK, > +}; > +static const unsigned int qspi_data4_pins[] = { > + /* MOSI_IO0, MISO_IO1, IO2, IO3 */ > + RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), > + RCAR_GP_PIN(1, 8), > +}; > +static const unsigned int qspi_data4_mux[] = { > + MOSI_IO0_MARK, MISO_IO1_MARK, IO2_MARK, IO3_MARK, > +}; > /* - SCIF0 ------------------------------------------------------------- */ > static const unsigned int scif0_data_pins[] = { > /* RX, TX */ > @@ -3671,6 +3694,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = > { SH_PFC_PIN_GROUP(msiof3_ss2), > SH_PFC_PIN_GROUP(msiof3_rx), > SH_PFC_PIN_GROUP(msiof3_tx), > + SH_PFC_PIN_GROUP(qspi_ctrl), > + SH_PFC_PIN_GROUP(qspi_data2), > + SH_PFC_PIN_GROUP(qspi_data4), > SH_PFC_PIN_GROUP(scif0_data), > SH_PFC_PIN_GROUP(scif0_clk), > SH_PFC_PIN_GROUP(scif0_ctrl), > @@ -3970,6 +3996,12 @@ static const char * const msiof3_groups[] = { > "msiof3_tx", > }; > > +static const char * const qspi_groups[] = { > + "qspi_ctrl", > + "qspi_data2", > + "qspi_data4", > +}; > + > static const char * const scif0_groups[] = { > "scif0_data", > "scif0_clk", > @@ -4212,6 +4244,7 @@ static const struct sh_pfc_function pinmux_functions[] > = { SH_PFC_FUNCTION(msiof0), > SH_PFC_FUNCTION(msiof1), > SH_PFC_FUNCTION(msiof2), > + SH_PFC_FUNCTION(qspi), > SH_PFC_FUNCTION(msiof3), I believe qspi comes after msiof3 :-) Apart from that the patch looks good. Acked-by: Laurent Pinchart <[email protected]> > SH_PFC_FUNCTION(scif0), > SH_PFC_FUNCTION(scif1), -- Regards, Laurent Pinchart -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
