On 13/02/2014 at 09:10:54 +0100, Nicolas Ferre wrote : > On 12/02/2014 20:47, Jean-Jacques Hiblot : > >> > >> You probably copied/pasted it but according to the block diagram, the > >> sdram controller is not under the apb. > > You're right I copied/pasted :o) But the addresses of the registers > > look like typical APB addresses. > > AFAIK all the registers of this SOC are accessed through the APB > > (except for OHCI and LCDC) > > Yes, that is the point: if the register bank appears as an APB address, > I place it on the APB bus. > The other master interfaces (on AHB) are the ones that the IP uses, not > us from the CPU point of view... > > So I think that Jean-Jacques DT is okay concerning this. >
Ok, I'm perfectly fine with that. Thanks for the answer ! -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
