On Thu, 20 Feb 2014, Vince Weaver wrote:
> On Thu, 20 Feb 2014, Vince Weaver wrote:
>
> > Might be relevant: check the last_cpu values. Right before the above
> > it looks like the thread gets moved from CPU 1 to CPU 0
> > (possibly as a result of the long chain started with the
> > close() of the tracepoint event),
> > so the problem NMI watchdog event being enabled is a different one than
> > the one that was disabled just before.
>
> so is this a false warning? If you get scheduled to a new CPU
> and there's an already running CPU-wide event, is that OK?
>
> Or should x86_pmu_disable() be setting PERF_HES_STOPPED on all events?
> It looks like other architectures are (such as armpmu_stop() ).
an actually I take that back, other architectures don't.
It's just confusing how
perf_pmu_disable()
calls
pmu->pmu_disable()
which on arm is:
armpmu_disable()
which calls:
armpmu->stop()
which is *not* the same as:
armpmu_stop()
but is actually armpmu->pmu->stop()
Urgh.
Vince
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